This class serves as the main entry point for the BYU/Xilinx debug instrumentation flow within RapidWright.
Dump an EDIF cell's contents to a Graphviz Dot Graph
Dump a Design's physical representation to a Graphviz Dot Graph
Dump BELs and connections from a single Site or SiteInst to a Graphviz Dot Graph
Example application in RapidWright for adding an ILA core within an implemented (placed and routed) design.